Name: Digital System Test and Testable Design: Using hdl Models and Architectures
SKU: 57567743
Price: 81.75 EUR
Availability: InStock
Author: Zainalabedin Navabi

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Digital System Test and Testable Design: Using hdl Models and Architectures

Type

Physical Book

Publisher

Springer

Author

Zainalabedin Navabi

Language

English

Pages

452

Format

Paperback

ISBN13

9781489979278

Edition No.

2011th

Digital System Test and Testable Design: Using hdl Models and Architectures

Zainalabedin Navabi (Author) · Springer · Paperback

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Synopsis "Digital System Test and Testable Design: Using hdl Models and Architectures"

Describes test methods in Verilog and PLI, which makes the methods more understandable and the gates possible to simulate Simulation of gate models allows fault simulation and test generation, while Verilog testbenches inject faults, evaluate fault coverage and apply new test patterns Describes DFT, compression, decompression, and BIST techniques in Verilog, which makes the hardware of the architectures easier to understand and allows simulation and evaluation of the testability methods

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Digital System Test and Testable Design: Using hdl Models and Architectures - Zainalabedin Navabi

Synopsis "Digital System Test and Testable Design: Using hdl Models and Architectures"

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